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IRAMS10UP60APBF
PD-94640 RevG
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1
RevG,.100507
IRAMS10UP60APBF
Internal Electrical Schematic - IRAMS10UP60APBF
V+ (10)
VRU (12) VRV (13) VRW (14)
Rg1
Rg3
Rg5
VB1 (7) U, VS1 (8) VB2 (4) V, VS2 (5) VB3 (1) W, VS3 (2)
23 VS1
22 21 20 19 18 17 VB2 HO2 VS2 VB3 HO3 VS3
Rg2
LO1 16
R3 HIN1 (15) HIN2 (16) HIN3 (17) LIN1 (18) LIN2 (19) LIN3 (20) T/ITRIP (21) RT VDD (22) VSS (23) THERMISTOR
24 HO1 25 VB1 1 VCC 2 HIN1 3 HIN2 4 HIN3 5 LIN1 LIN2 LIN3 F ITRIP EN RCIN VSS COM 6 7 8 9 10 11 12 13 LO2 15
Rg4 Driver IC Rg6
LO3 14
R1 R2 C
2
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IRAMS10UP60APBF
Inverter Section Electrical Characteristics @ TJ = 25C
Symbol V(BR)CES V(BR)CES / T VCE(ON) ICES Ilk_module VFM Parameter Collector-to-Emitter Breakdown Voltage Temperature Coeff. Of Breakdown Voltage Collector-to-Emitter Saturation Voltage Zero Gate Voltage Collector Current-to-Emitter Zero Gate Phase-to-Phase Current Diode Forward Voltage Drop Min 600 ---------------Typ --0.57 1.7 2.0 5 10 -1.8 1.3 Max ----2.0 2.4 15 40 50 2.35 1.7 Units Conditions V V/C V VIN=0V, IC=20A VIN=0V, IC=1.0mA (25C - 150C) IC=5A IC=5A TJ=25C, VDD=15V TJ=150C
A A
V
VIN=5V, V+=600V VIN=5V, V+=600V, TJ=150C VIN=5V, V+=600V IC=5A IC=5A, TJ=150C
Inverter Section Switching Characteristics
Symbol Eon Eoff Etot Eon Eoff Etot Erec trr RBSOA Parameter Turn-On Switching Loss Turn-Off Switching Loss Total Switching Loss Turn-on Swtiching Loss Turn-off Switching Loss Total Switching Loss Diode Reverse Recovery energy Diode Reverse Recovery time Reverse Bias Safe Operating Area Short Circuit Safe Operating Area Min ----------------Typ 200 75 275 300 135 435 30 100 FULL SQUARE Max 235 100 335 360 165 525 40 145 Units Conditions IC=5A, V+=400V VDD=15V, L=1mH See CT1 TJ=25C TJ=150C
J
J J
ns
Energy losses include "tail" and diode reverse recovery TJ=150C, V+ =400V VDD=15V, IF=5A, L=1mH TJ=150C, IC=5A, VP=600V V+=480V, VDD=+15V to 0V See CT3
SCSOA
10
---
---
s
TJ=150C, VP=600V, V+=360V, VDD=+15V to 0V
See CT2
Thermal Resistance
Symbol Rth(J-C) Parameter Junction to case thermal resistance, each IGBT under inverter operation. Junction to case thermal resistance, each Diode under inverter operation. Thermal Resistance case to sink Min --Typ 4.2 Max 4.7 Units Conditions C/W Flat, greased surface. Heatsink compound thermal C/W conductivity - 1W/mK C/W
Rth(J-C) Rth(C-S)
-----
5.5 0.1
6.5 ---
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IRAMS10UP60APBF
Absolute Maximum Ratings Driver Function
Absolute Maximum Ratings indicate substaines limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to VSS (Note 1)
Symbol VS1,2,3 VB1,2,3 VDD VIN TJ
Definition High Side offset voltage High Side floating supply voltage Low Side and logic fixed supply voltage Input voltage LIN, HIN, T/ITRIP Juction Temperature
Min -0.3 -0.3 -0.3 -0.3 -40
Max 600 20 20 7 150
Units V V V V C
Recommended Operating Conditions Driver Function
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. All voltages are absolute referenced to VSS. The VS offset is tested with all supplies biased at 15V differential (Note 1). All input pin (VIN ) and ITRIP are clamped with a 5.2V zener diode and pull-up resistor to VDD
Sym bol VB1,2,3 VS1,2,3 VDD VITRIP VIN
Definition High side floating supply voltage High side floating supply offset voltage Low side and logic fixed supply voltage T/ITRIP input voltage Logic input voltage LIN, HIN
Min VS+12 Note 2 12 VSS VSS
Max VS+20 450 20 VSS+5 VSS+5
Units V V V
Static Electrical Characteristics Driver Function
VBIAS (VCC, VBS1,2,3)=15V, unless otherwise specified. The VIN and IIN parameters are referenced to VSS and are applicable to all six channels. (Note 1)
Symbol VIN,th+ VIN,thVCCUV+ VBSUV+ VCCUVVBSUVVCCUVH VBSUVH IQBS IQCC ILK IIN+ IIN+ V(ITRIP)
Definition Positive going input threshold Negative going input threshold VCC and VBS supply undervoltage Positive going threshold VCC and VBS supply undervoltage Negative going threshold VCC and VBS supply undervoltage Ilockout hysteresis Quiescent VBS supply current Quiscent VCC supply current Offset Supply Leakage Current Input bias current (OUT=LO) Input bias current (OUT=HI) ITRIP threshold Voltage (OUT=HI or OUT=LO)
Min 3.0 --10.6 10.4 ------------3.85
Typ ----11.1 10.9 0.2 70 1.6 --100 200 4.3
Max --0.8 11.6 11.4 --120 2.3 50 220 300 4.75
Units V V V V V
A
mA
A A A
V
4
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IRAMS10UP60APBF
Dynamic Electrical Characteristics
VDD=VBS=VBIAS=15V, Io=1A, VD=9V, PWMIN=2kHz, VIN_ON=VIN_th+, VIN_OFF=VIN_thTA=25C, unless otherwise specified
Symbol TON TOFF DT I/TTrip TFCLTRL
Definition Input to output propagation turn-on delay time (see fig.11) Input to output propagation turn-off delay time (see fig. 11) Dead Time T/ITrip to six switch to turn-off propagation delay (see fig. 2) Post ITrip to six switch to turn-off clear time (see fig. 2)
Min -
Typ 470 615 300 750 9
Max -
Units ns ns ns ns ms
Internal NTC - Thermistor Characteristics
Parameter R25 R125 B Resistance Resistance B-Constant (25-50C) Typ 100 +/- 5% 2.522 + 17.3 % /- 14.9% 4250 +/- 3% -40 / 125 1 Units k k k C mW/C TC = 25C Conditions TC = 25C TC = 125C R2 = R1e [B(1/T2 - 1/T1)]
Temperature Range Typ. Dissipation constant
Note 1: For more details, see IR21365 data sheet Note 2: Logic operational for Vs from V--5V to V-+600V. Logic stata held for VS from V--5V to V--VBS. (Please refer to DT97-3 for more details)
Thermistor Built-in IRAMS10UP60APBF
VCC (22) NTC 12K IR21365
T/ITRIP (21) 4.3k
VSS (23)
Note 3: The Maximum recommended sense voltage at the T/ITRIP terminal under normal operating conditions is 3.3V.
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IRAMS10UP60APBF
Figure1. Input/Output Timing Diagram
HIN1,2,3
LIN1,2,3
HO1,2,3
LO1,2,3
Itrip
U,V,W
Note 4: The shaded area indicates that both high-side and low-side switches are off and therefore the halfbridge output voltage would be determined by the direction of current flow in the load.
V+
Itrip 0 0 0 1
U,V,W (8,5,2)
HIN1,2,3 0 1 1 X
LIN1,2,3 1 0 1 X
U,V,W Vbus 0 X X
Hin1,2,3 (15,16,17) IC Driver Lin1,2,3 (18,19,20)
Ho
Lo
6
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IRAMS10UP60APBF
Figure 2. T/ITrip Timing Waveform
HIN1,2,3
LIN1,2,3
50% T/Itrip
U,V,W
50%
tfltclr
Note 5: The shaded area indicates that both high-side and low-side switches are off and therefore the halfbridge output voltage would be determined by the direction of current flow in the load.
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IRAMS10UP60APBF
Module Pin-Out Description
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Name VB3 W,VS3 na VB2 V,VS2 na VB1 U,VS1 na V+ na LE1 LE2 LE3 HIN1 HIN2 HIN3 LIN1 LIN2 LIN3 T/Itrip VCC VSS Description High Side Floating Supply Voltage 3 Output 3 - High Side Floating Supply Offset Voltage none High Side Floating Supply voltage 2 Output 2 - High Side Floating Supply Offset Voltage none High Side Floating Supply voltage 1 Output 1 - High Side Floating Supply Offset Voltage none Positive Bus Input Voltage none Low Side Emitter Connection - Phase 1 Low Side Emitter Connection - Phase 2 Low Side Emitter Connection - Phase 3 Logic Input High Side Gate Driver - Phase 1 Logic Input High Side Gate Driver - Phase 2 Logic Input High Side Gate Driver - Phase 3 Logic Input Low Side Gate Driver - Phase 1 Logic Input Low Side Gate Driver - Phase 2 Logic Input Low Side Gate Driver - Phase 3 Temperature Monitor and Shut-down Pin +15V Main Supply Negative Main Supply
8
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IRAMS10UP60APBF
Typical Application Connection IRAMS10UP60APBF
VBW VSW U
BOOT-STRAP CAPACITORS
3-ph AC MOTOR V
VBV VSV
CURRENT SENSING CAN USE A SINGLE SENSE RESISTOR OR PHASE LEG SENSING AS SHOWN
W
VBU VSU
V+
DC BUS CAPACITORS
LeU
PHASE LEG CURRENT SENSE
LeV LeW HINU HINV HINW
Driver IC
CONTROLLER
LINU LINV LINW 5k 3.3 V 1m 6.8K 10.2k 10m 0.1 m T/ITRIP VDD(15 V) VSS NTC 12k
TEMP SENSE
O/C SENSE (ACTIVE LOW)
1. Electrolytic bus capacitors should be mounted as close to the module bus terminals as possible to reduce ringing and EMI problems. Additional high frequency ceramic capacitor mounted close to the module pins will further improve performance. 2. In order to provide good decoupling between VCC-Gnd and VB-VSS terminals, the capacitors shown connected between these terminals should be located very close to the module pins. Additional high frequency capacitors, typically 0.1F, are strongly recommended. 3. Value of the boot-strap capacitors depends upon the switching frequency. Their selection should be made based on IR design tip DN 98-2a, application note AN-1044 or Figure 9. 4. Low inductance shunt resistors shuld be used for phase leg current sensing. Similarly, the length of the traces between pins 12, 13 and 14 to the corrisponding shunt resistors should be kept as small as possible. 5. Over-current sense signal can be obtained from external hardware detecting excessive instantaneous current in inverter.
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IRAMS10UP60APBF
Maximum RMS Output Current/Phase (A). 10 9 8 7 6 5 4 3 2 1 0 0 2 4 6 8 10 12 14 16 18 20 PWM Switching Frequency (kHz)
Figure 3. Maximum sinusoidal phase current as function of switching frequency VBUS=400V, Tj=150C, Modulation Depth=0.8, PF=0.6
Tc=100C Tc=110C Tc=120C
7 Switching Frequency: Maximum RMS Phase Current (A). 6 5 4 3 2 1 0 1 10 Motor Current Modulation Frequency (Hz)
Figure 4. Maximum sinusoidal phase current as function of modulation frequency VBUS=400V, Tj=150C, Tc=100C, Modulation Depth=0.8, PF=0.6
12 kHz 16 kHz 20 kHz
100
10
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IRAMS10UP60APBF
9 8 7 6 Current (A) 5 4 3 2 1 0 -1 0.0 0.1 0.2 0.3 0.4 0.5 Time (s)
Figure 5. IGBT Turn-on. Typical turn-on waveform @Tj=125C, VBUS=400V
450 Current Voltage 400 350 300 Voltage (V)
Voltage (V)
250 200 150 100 50 0 -50 0.6 0.7 0.8 0.9 1.0
9 8 7 6 Current (A) 5 4 3 2 1 0 -1 0.0 0.1 0.2 0.3 0.4 0.5 Time (s)
Figure 6. IGBT Turn-off. Typical turn-off waveform @Tj=125C, VBUS=400V
450 400 350 Current Voltage 300 250 200 150 100 50 0 0.6 0.7 0.8 0.9 -50 1.0
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IRAMS10UP60APBF
1000
Thermistor Resistance (k _)
Minimum 100 Nominal Maximum
10
1 0 20 40 60 80 100 120 140 Temperature (C)
Figure 7. Variation of thermistor resistance with temperature
4
3 V sense (V) . Maximum Nominal Minimum
2
1
0 0 20 40 60 80 Thermistor Temperature (C) 100 120 140
Figure 8. Variation of temperature sense voltage with thermistor temperature using external bias resistance of 4.3K, VCC=15V
12
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IRAMS10UP60APBF
180 160 140 120 100 80 60 80 90 100 110 120 Thermistor Temperature (C) 130 140 150
IGBT Junction Temperature (C).
Figure 9. Estimated maximum IGBT junction temperature with thermistor temperature
20 17.5 15 Capacitance (F) 12.5 10 7.5 5 2.5 0 0 1.5 3 4.5 5 6 7.5 9 10 10.5 12 13.5 15 15 16.5 18 19.5 20 Switching Frequency (kHz) 6.8 4.7 3.3 2.2 15
Figure 10. Recommended minimum Bootstrap Capacitor value Vs Switching Frequency
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IRAMS10UP60APBF
Figure 11. Switching Parameter Definitions
VCE
50% HIN/LIN
IC
IC
90% IC
VCE HIN/LIN
90% IC
HIN/LIN
50% HIN/LIN
10% VCE
10% IC
10% IC
TON
tr
Figure 11a. Input to Output propagation turn-on delay time
TOFF
tf
Figure 11b. Input to Output propagation turn-off delay timet
IF VCE HIN/LIN
Irr trr
Figure 11c. Diode Reverse Recovery
14
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IRAMS10UP60APBF
Vbus 5V
Ho
Hin1,2,3
IC Driver
U,V,W
Lo
Lin1,2,3
Figure CT1. Switching Loss Circuit
Vbus
Hin1,2,3 1k VCC 5VZD IN 10k Lin1,2,3
IC Driver
Ho
IN
PWM=4s
U,V,W
Lo
Io
VP=Peak Voltage on the IGBT die
Io
Figure CT2. S.C.SOA Circuit
Vbus
Hin1,2,3 1k VCC 5VZD 10k
IC Driver
Ho
IN
U,V,W
Lo
Io
Lin1,2,3 IN
VP=Peak Voltage on the IGBT die
Io
Figure CT3. R.B.SOA Circuit
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IRAMS10UP60APBF
Package Outline
note 2 note 3
027-E2D24
note 1
Standard pin leadforming option
Notes: Dimensions in mm 1 - Marking for pin 1 identification 2- Product Part Number 3- Lot and Date code marking
For mounting instruction see AN-1049
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IRAMS10UP60APBF
Package Outline
note 2 note 3
027-E2D24
note 1
Pin leadforming option -2
Notes: Dimensions in mm 1 - Marking for pin 1 identification 2- Product Part Number 3- Lot and Date code marking Data and Specifications are subject to change without notice
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information Rev G, 10/07
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